Observation of Cross Section of Power Semiconductor Device – SEM and High-sensitivity EDS


As the electrification of cars and other transportation equipment is making progress, the development of power semiconductors using Sic is accelerating.
Since the mounting of such power semiconductors on actual vehicles has already begun, it is the urgent need to ensure their durability. It is generally known that the heat resistance of power semiconductors is high. However, since it can be assumed that delamination and other troubles will occur at the bonding section with the electrode as temperature rises due to the control of large current. For this reason, it is important to observe and analyze the bonded section between Sic and the electrode.

Example of analysis: Analysis of an Sic-MOS transistor

The bonded section between the plating film of the electrode on the back of
    SiC-MOS-FET and the device were analyzed by use of high-sensitivity EDS.

Element mapping by high-sensitivity EDS

Since it is possible to clearly observe the conditions of the Ni layer, AuAgSn layer and Pb solder layer being laminated on the Sic substrate, it is possible to analyze the defects such as delamination at each bonded section.

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